bespoke-silicon-group / basejump_stl
BaseJump STL: A Standard Template Library for SystemVerilog
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BaseJump STL: A Standard Template Library for SystemVerilog
RISC-V Debug Support for our PULP RISC-V Cores
Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.
VeeR EL2 Core
A Linux-capable RISC-V multicore for and by the world
Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.